Exemplary embodiments relate to a semiconductor memory device and a method of erasing the same.
There is an increasing demand for semiconductor memory devices which can be electrically programmed and erased and can retain data even without the supply of power. In order to develop high-capacity memory devices capable of storing a large amount of data, technologies for the high integration of memory cells are being researched. To this end, there has been proposed a NAND type memory device including a plurality of memory blocks, each having a plurality of strings. Each of the strings have memory cells coupled thereto in series.
The semiconductor memory device performs an erase operation for erasing data on a memory-cell-block basis.
In the erase operation, the memory cells of the memory cell block have various threshold voltages. In particular, when the memory cells are multi-level cells (MLCs), the threshold voltages of the memory cells have 4, 8, or more threshold voltage distributions. Consequently, there is a great difference between a low threshold voltage and a high threshold voltage.
Accordingly, if the erase operation is performed on a memory-cell-block basis with memory cells having various threshold voltages, the threshold voltages of the memory cells are widely distributed at 0 V or less.
If the threshold voltages of the memory cells having the erase state (referred to as “erase cells”) have a wide distribution width at 0V or less, threshold voltages of memory cells in a subsequent data program operation are also likely to have a wide distribution width. In order to prevent this occurrence, it is important that the threshold voltages of the erase cells having 0 V or less are made to have a narrow threshold voltage distribution close to 0 V.
To this end, a pre-program is performed on a memory cell block including MLCs before the erase operation is performed.
The pre-program is performed so that the threshold voltages of all memory cells belong to the highest threshold voltage distribution. If the erase operation is performed in the state in which the threshold voltages of the memory cells belong to the highest threshold voltage distribution, relevant erase cells may have a narrow threshold voltage distribution.
In the conventional pre-program, however, memory cells having high threshold voltages have higher threshold voltages because all the memory cells are programmed at the same time. Consequently, efficiency to place erase cells within a narrow threshold voltage distribution through the pre-program may be reduced.